Modern electronic devices such as, but not limited to, mobile devices and traditional computer systems are consistently being driven to operate faster and consume less power. One way to meet these demands is to supply ICs with a faster clock and a smaller voltage supply while reducing the gate thickness of individual transistors on the ICs and thus reducing logic one voltage levels. While this has largely proved successful, many ICs must be compatible to interact with other ICs that have larger power supply voltages, thicker transistor gates and higher logic one voltage values. For example, it is not uncommon for digital circuitry located on, for example, a chip set circuit to interact with several peripheral devices over one or more suitable physical buses. As known to those of ordinary skill in the art, a chip set circuit may include a north bridge circuit, a south bridge circuit, a combined north bridge and south bridge circuit or any other suitable memory bridge circuit that is coupled to, among other things, one or more processors and peripheral devices such as keyboards, a mouse, etc. and one or more memory devices. While it is desirable to fabricate chip set circuits and other ICs using fast transistors having a small gate thickness and small power supplies, such circuits may need to interact with other ICs such as peripheral device ICs having transistors with thick gates and large power supplies. However, if a chip set circuit or other IC having fast, thin gate transistors receives digital logic values from peripheral devices having transistors with thicker gates and larger power supplies (and thus larger logic one voltage values), the chip set circuit transistors might be damaged and rendered unoperational.
For example, a chip set circuit might be designed to operate using a voltage supply of 1.8 V and use single gate oxide transistors such as MOSFETs with a relatively thin gate oxide thickness to support processing speeds of up to several hundred MHz and thus generating a 1.8 V logic one value. Hereinafter, transistors supporting a 1.8 V power supply and generating a 1.8 V logic one value, as described above, are referred to as “1×” transistors. Transistors, such as 1× transistors, are generally designed based on, among other things, a reliability criterion. The reliability criterion indicates how reliable the transistor will be over a period of time when exposed to a variety of voltage differences between any two terminals of the transistor. As understood by one having ordinary skill in the art, 1× transistors presently have a reliability criterion indicating that they will provide 10 years of reliable operation if exposed to no more than 1.8 V plus a predetermined tolerance voltage between any two terminals. The predetermined tolerance value may be any suitable percentage or voltage amount. However, it is not uncommon to see tolerance values expressed as 20%.
The chip set circuit may need to communicate with a first circuit that operates using a voltage supply of 3.3 V and having single gate oxide transistors such as MOSFETs with a relatively larger gate thickness to support processing speeds of up to tens of MHz and thus generating a logic one voltage value of 3.3 V. Hereinafter, transistors supporting a 3.3 V power supply and generating a 3.3 V logic one value, as described above, are referred to as “2×” transistors. 2× transistors presently have a reliability criterion indicating that they will provide 10 years of reliable operation if exposed to a maximum voltage difference of 3.3 V plus a predetermined tolerance value between any two terminals. Similar to 1× transistors, 2× transistors may have any suitable tolerance value, percentage or amount. It is not uncommon to see tolerance values expressed as 20%.
Similarly, the chip set circuit may need to communicated with a second circuit that operates using a voltage supply of 5.0 V and having single gate oxide transistors such as MOSFETs with a relatively larger gate thickness when compared to 1× and 2× transistors to support processing speeds in the low MHz range and generating a 5.0 V logic one value. Hereinafter, transistors supporting a 5.0 V voltage swing, as described above, are referred to as “3×” transistors. 3× transistors presently have a reliability criterion indicating that they will provide 10 years of reliable operation if exposed to a maximum voltage difference of 5.0 V plus a predetermined tolerance value between any two terminals. Similar to 1× transistors and 2× transistors, 3× transistors may have any suitable tolerance value, percentage or amount. It is not uncommon to see tolerance values expressed as 20%.
However, the chip set circuit or other IC having 1× transistors cannot handle input signals having logic one values generated by the circuits having a 2× or 3× transistors. Prior art solutions utilized, among other things, a resister divider to scale the voltage level of input signals thereby reducing the logic one voltage levels to a level the chip set circuit or other IC could properly handle. However, the user of a resister divider, provides undesirable effects such as sinking current from the input signal and thus interfering with signal integrity. Resister dividers also allowed static leakage current when the input signal was high and thus adversely consumed power.
Accordingly a need exists for, among other things, generating a scaled output signal that has a lower logic one value than the logic one value of the underlying input signal. A similar need exists for efficiently generating the scaled output signal using a low power supply and thin gate transistors. For purposes of illustration only, a need exists for efficiently scaling input signals acceptable for 3× transistors into input signals acceptable for 1× transistors. Scaling larger logic one voltage levels to smaller logic one voltage levels allows for safe interpretation of digital logic signals by ICs with thinner gate oxide transistors and lower power supply voltages. A similar need exists for scaling an input signal while not sinking current or creating static leakage current.
Another need exists for discerning the voltage level of an input signal and generating a reference signal based on the voltage level of the input signal. A similar need exists for discerning the voltage level of the input signal and generating a representative voltage reference signal while not sinking current or creating static leakage current.